1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device for use, e.g., in optical communications, etc.
2. Background Art
Japanese Laid-Open Patent Publication No. 2002-246684 discloses that, in the manufacture of a semiconductor device having a ridge stripe, epitaxially growing compound semiconductor layers (e.g., InP burying layers) on both sides of the ridge stripe results in unwanted projections being formed on the compound semiconductor layers. This publication discloses a technique for etching away these projections using an etchant including hydrochloric acid, acetic acid, and hydrogen peroxide solution.
These projections on the compound semiconductor layers should preferably be removed since they serve to degrade the characteristics of the semiconductor device. They can be removed by wet etching. However, it has been found that such a wet etching process may result in etching of the upper semiconductor layer overlying the active layer and formed in contact with the compound semiconductor layers, to such an extent that the active layer is exposed. The exposed surface of the active layer will be oxidized, resulting in a weaker optical confinement in the semiconductor device. Therefore, the projections on the compound semiconductor layers must be removed in such a manner that the active layer is not exposed even if the upper semiconductor layer is etched. Further, the amount of material etched from the upper semiconductor layer must be minimized in order to maintain the optical confinement effect of the upper semiconductor layer.
In the technique disclosed in the above patent publication, when the projections on the compound semiconductor layers described above are removed, the contact layer and the etch rate control layer disposed above the cladding layer (i.e., the upper semiconductor layer) serve to prevent etching of the cladding layer. In order to reliably prevent etching of the cladding layer, however, the contact layer and the etch rate control layer must have a substantial thickness, resulting in increased manufacturing cost. Furthermore, it has been found that the high temperature at which the compound semiconductor layers are formed causes the dopant of the contact layer to diffuse, thereby degrading the characteristics of the semiconductor device.
Further, in order to prevent etching of the cladding layer, the technique of the above patent publication requires that the compound semiconductor layers be formed to have a substantial thickness so that the (111) non-growth surfaces of the projections on these layers are at a higher level than the top surface of the etch rate control layer.